Waterline technology is every the instruction is decomposed one kind for much pace, let each pace operate jackknife, implement a few directives thereby the technology of collateral processing. The instruction in the program still is carry out orderly, but can take beforehand a certain number of instruction, have not carry out in current statement when, start the move of another some of operation of follow-up instruction ahead of schedule. Can accelerate the moving process of a paragraph of program apparently so.
All sorts of different 1 6 that roll out on the market / 3 2 microprocessor basically used automation line technology. If 8 0 4 8 6 and P E N T I U M all used structure of 6 paces automation line, the 6 paces of automation line are:
(1) takes an instruction. C P U takes an instruction from inside high speed cache or memory.
(Coding of 2) instruction. Analyse instruction property.
(3) address is generated. A lot of instructions should visit the operand in memory, the address of operand perhaps is in instruction word, perhaps want to get through certain operation.
(4) takes operand. When the instruction needs operand, require revisit memory, find site to operand and numerate.
(5) implements a directive. Execute the operation that the instruction sets by A L U.
(6) stores or " keeps a " outcome. Last operation result is deposited to some memory unit or write an accumulator A.
Below good case, every pace needs cycle of a clock. When automation line is completely replete, every clock cycle has an instruction on average to be carried out from automation line end, output a result, like going up to come out from assembly line like the car. Of P E N T I U M, Pentium Pro and Pentium II processor exceeding scalar quantity to design was to couple two statements that become independent with 3 respectively more automation line, every automation line implements a directive on average inside cycle of a clock, they are so average cycle of a clock parts executable 2 dictate with 3.
Automation line technology comes true through increasing computer hardware. Want to be able to take an instruction beforehand for example, add the hardware circuitry that takes an instruction with respect to need, deposit the instruction of fetch to instruction alignment cache implement in, make M P U can undertake extraction the operation of instruction and analysis, executive instruction at the same time. Accordingly, in 1 6 / 3 2 A L U of two arithmetical and logistic unit is contained commonly in microprocessor, advocate A L U is used at implementing a directive, another A L U is special generate at the address, such ability can make address computation and other operation jackknife undertake.
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